vZTech Virtual SMS Tech Conference

10 - 12 November, 2020

.. Days .. Hours .. Minutes .. Seconds

Thank you for taking part

A big thanks to all attendees, speakers and moderators. You all have made this event very special. Hope to meet you in future again - virtually or face to face.

Take care and stay healthy.

vZTech

What's that?

vZTech is a virtual event, 24 hours online accessible with live elements. You can join whenever it is convenient for you.

In several virtual rooms you will have the opportunity to join live presentations, gather on-demand information, watch videos or download documents. Through networking functions you can get in touch with other attendees via video and/or text chats. You can see who is online in each room.

Key Notes and Highlight Talks

Jan Mulkens

ASML

ASML Corporate Fellow

Christoph Hensche

ZEISS

Head of ZEISS SMS

Dr. Markus Waiblinger

ZEISS

Senior Product Manager

Dr. Michael Waldow

ZEISS

Product Manager Field of Business Repair

Ofir Sharoni

ZEISS

Head of Product Management FoB Tuning

Dr. Jens Oster

ZEISS

Head of Application & Product Manager Repair Customization

Ute Buttgereit

ZEISS

Head of Product Management AIMS®/WLCD

Kristian Schulz

ZEISS

Global R&D Sr. Product Manager Digital

vZTech Conference Program

Three days program for all time zones

Below you'll find the overview over all live presentations. Please use the tabs to switch between the event days. Each live presentation is scheduled for Asian and US time zones. The given time zone in the table is MET. Please scroll down for presentation details such as abstracts. Seize the chance to book an online consultancy upfront with one of our experts.

MET

Topic

Speaker

You can online also meet

8:00 am

Dedicated Solutions for todays and tomorrows Photomask Manufacturing

Christoph Hensche, Head of SMS

Dr. Axel Zibold, Falk Moehr, Sascha Perlitz, Dr. Klaus Edinger, Dr. Matthias Stecher, Dr. Thomas Weyh, Shalev Dror, Oliver Luft, Modern Xu, JunSeok Lee, Satoshi Watanabe, Robert Birkner, Thomas Thaler, Thomas Zeuner

8:30 am

Invited Key Note: Understanding the Edge Placement Error budget for current and future node logic and memory devices

Jan Mulkens, ASML Corporate Fellow

9:15 am

Excursion Prevention Strategy to Increase Chip Performance by Photomask Tuning

Ofir Sharoni, Head of Product Management FoB Tuning

 

 

 

 

5:00 pm

Dedicated Solutions for todays and tomorrows Photomask Manufacturing

Christoph Hensche, Head of SMS

Dr. Axel Zibold, Falk Moehr, Sascha Perlitz, Dr. Klaus Edinger, Dr. Matthias Stecher, Dr. Thomas Weyh, Shalev Dror, Jim Polcyn, Robert Birkner, Thomas Thaler, Thomas Zeuner

5:30 pm

Invited Key Note: Understanding the Edge Placement Error budget for current and future node logic and memory devices

Jan Mulkens, ASML Corporate Fellow

6:15 pm

Excursion Prevention Strategy to Increase Chip Performance by Photomask Tuning

Ofir Sharoni, Head of Product Management FoB Tuning

Note: Given time is MET (Middle European Time Zone), so UTC +1

MET Time

Topic

Speaker

You can online also meet

8:00 am

Get rid of the yield killer

Dr. Markus Waiblinger, Senior Product Manager

Dr. Klaus Edinger, Steffen Taborsky, Christian Ehrlich, Hans van Doornmalen, JunSeok Lee, Satoshi Watanabe, Modern Xu, Oliver Luft

8:30 am

High-end EUV Photomask Repairs for advanced nodes

Dr. Michael Waldow, Product Manager FoB Repair

9:00 am

Automation and Process Control Solutions for Mask Repair

Dr. Jens Oster, Head of Application & Product Manager Repair Customization

 

 

 

 

5:00 pm

Get rid of the yield killer

Dr.  Markus Waiblinger, Senior Product Manager

Dr. Klaus Edinger, Dr. Thoms Weyh, Jim Polcyn

5:30 pm

High-end EUV Photomask Repairs for advanced nodes

Dr. Michael Waldow, Product Manager FoB Repair

6:00 pm

Automation and Process Control Solutions for Mask Repair

Dr. Jens Oster, Head of Application & Product Manager Repair Customization

Note: Given time is MET (Middle European Time Zone), so UTC +1

MET Time

Topic

Speaker

You can online also meet

8:00 am

Digital Support and Automation Solutions

Kristian Schulz, Global R&D Sr. Product Manager Digital

Robert Birkner, Hans van Doornmalen, JunSeok Lee, Oliver Luft, Modern Xu, Dr. Kokila Egodage, Thomas Thaler, Thomas Zeuner

8:30 am

Mask Qualification for Mature Market

Ute Buttgereit, Head of Product Management AIMS®/WLCD

9:00 am

Advanced Metrology Capabilities for EUV Masks

Dr. Dirk Beyer, Head of Product Management PROVE®

 

 

 

 

5:00 pm

Digital Support and Automation Solutions

Kristian Schulz, Global R&D Sr. Product Manager Digital

Dr. Kokila Egodage, Jim Polcyn, Robert Birkner, Thomas Thaler, Thomas Zeuner

5:30 pm

Mask Qualification for Mature Market

Ute Buttgereit, Head of Product Management AIMS®/WLCD

6:00 pm

Advanced Metrology Capabilities for EUV Masks

Dr. Dirk Beyer, Head of Product Management PROVE®

Note: Given time is MET (Middle European Time Zone), so UTC +1

Opening

Dedicated Solutions for todays and tomorrows Photomask Manufacturing Christoph Hensche, Head of SMS

We will welcome you with an opening speech introducing the portfolio of photomask solutions with focus on innovations in the Repair and EUV measurement field.  

Date & Time (APAC & EMEA)

Tuesday, 10 Nov
8:00-8:30 am MET

Date & Time (EMEA & US)

Tuesday, 10 Nov
5:00-5:30 pm MET

Key Note

Understanding the Edge Placement Error budget for current and future node logic and memory devices

Jan Mulkens, ASML

EUV lithography is being used for the production of 7-nm and 5-nm node logic devices and recently major memory manufacturers also revealed the use of EUV in the latest DRAM generation. With EUV it has become important to quantify the patterning requirements, thru the EPE metric, since photon and resist stochastics are becoming more dominant. Depending on the exact patterning method, the allowed maximum edge placement error (EPE) is driven towards single digit numbers (7-nm to 9-nm) and it thorough understanding of the error budget is required to achieve and reduce these numbers further.

In the presentation the EPE budget will be explained and it will be shown how a holistic patterning approach can be used to minimize overlay and EPE of the final pattern. The holistic approach combines advanced wafer metrology and scanner actuator control using computational lithography. The metrology solutions include optical and e-beam based methods to determine the pattern overlay and CD on device scale. Based on data obtained for logic and memory use cases we see that the main contributors of the EPE budget are: local errors, overlay errors, optical proximity errors and CD variation. The Mask is a known to contribute to intra-field fingerprints for both CD and registration, but recent studies also have shown that local errors are very significant and with this improvements of all these mask parameters is needed to secure the next step in EPE.

Date & Time (APAC & EMEA)

Tuesday, 10 Nov
8:30-9:10 am MET

Date & Time (EMEA & US)

Tuesday, 10 Nov
5:30-6:10 pm MET

Tuning

Excursion Prevention Strategy to increase Chip Performance by Photomask Tuning Ofir Sharoni

The presentation will show that controlling wafer CDU - even if the CDU is in spec - can reduce process defect failure probability and by that can reduce the yield loss.

Date & Time (APAC & EMEA)

Tuesday, 10 Nov
9:15-9:45 am MET

Date & Time (EMEA & US)

Tuesday, 10 Nov
6:15-6:45 pm MET

Particle Removal

Get rid of the yield killer Dr. Markus Waiblinger

Off the beaten path: a novel approach to fight defectivity with a never been there efficiency.

Date & Time (APAC & EMEA)

Wednesday, 11 Nov
8:00-8:30 am MET

Date & Time (EMEA & US)

Wednesday, 11 Nov
5:00-5:30 pm MET

Repair

High-end EUV Photomask Repairs for advanced Nodes Dr. Michael Waldow

Scaling trends in the semiconductor industry towards smaller technology nodes and features sizes are continuing and first consumer products manufactured with the help of EUV technology are already on the market. During the talk the latest results of high-end EUV repairs carried out on the next generation photomask repair system MeRiT® LE will be presented.

Date & Time (APAC & EMEA)

Wednesday, 11 Nov
8:30-9:00 am MET

Date & Time (EMEA & US)

Wednesday, 11 Nov
5:30-6:00 pm MET

Beyond Digitalization

Automation and Process Control Solutions for Mask Repair Jens Oster

Automation is more and more a key success factor in mask manufactruing. We will provide a short overview on the range of Automation Solutions for Mask Repair. One solution, the Advanced AutoRepair provides a fully automated workflow of Photomask repair. DataScoop is a unified health monitoring and analysis tool for MeRiT® and PRT. The Large Defect Repair application provides improved operational throughput and repair controllability for the repair of defects up to 4x4µm^2 size.

Date & Time (APAC & EMEA)

Wednesday, 11 Nov
9:00-9:30 am MET

Date & Time (EMEA & US)

Wednesday, 11 Nov
6:00-6:30 pm MET

Digital

Digital Support and Automation Solutions Kristian Schulz

Fully automated processes in mask manufacturing offer significantly better yields, output, cycle times, operating costs and flexibility than manually driven ones. In order to achieve this, a wide range of digital solutions can bridge the gaps between equipment by use of overarching and integrating solutions as well as solutions dedicated to individual processes. Digital support, however, comprises more than manufacturing processes and can go far beyond this. It is the embedding element that keeps the engine running optimally.

Date & Time (APAC & EMEA)

Thursday, 12 Nov
8:00-8:30 am MET

Date & Time (EMEA & US)

Thursday, 12 Nov
5:00-5:30 pm MET

Metrology

Mask Qualification for Mature Market Ute Buttgereit

The industry usually focusses on high-end market driven by smaller feature sizes and continuously tightening mask specifications. However, most of the mask volume goes into larger technology nodes and serves the needs of the mature market. In that market segment high productivity at low cost and high yield are the main challenges. In this talk ZEISS will present solutions that addresses these challenges to ensure an effective mask qualification using AIMS® technology.

Date & Time (APAC & EMEA)

Thursday, 12 Nov
8:30-9:00 am MET

Date & Time (EMEA & US)

Thursday, 12 Nov
5:30-6:00 pm MET

Metrology

Advanced Metrology Capabilities for EUV Masks Dr. Dirk Beyer

For EUV lithography the mask-to-mask contribution as part of the overall on-product overlay budget can not be neglected anymore. In order to reach the required pattern placement at mask, state of the art registration systems enable the calibration of latest generation writing tools by a new level of metrology precision as well as dense sampling schemes. Additional overlay contributors can be adressed by measurements of front and mask backside flattnes. Even more, the unique stage accuracy of registration metrology tools allows for the precise location of native EUV defects as needed for defect mitigation strategies.

Date & Time (APAC & EMEA)

Thursday, 12 Nov
9:00-9:30 am MET

Date & Time (EMEA & US)

Thursday, 12 Nov
6:00-6:30 pm MET

Contact

Send an email for late sign up

We are sorry, the regular registration has closed after November 3. If you want to join vZTech, please send us an email containing the following information:

First Name, Last Name, Email Address, Company, Job Titel, Country.

We will then get back to you shortly.

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